sync signal
英 [sɪŋk ˈsɪɡnəl]
美 [sɪŋk ˈsɪɡnəl]
网络 同步信号; 同步信號; 同步讯号
双语例句
- Looking for the sync PULSE has always been one of the "trickiest" of tasks for the DISPLAY signal PROCESSor.
对于显示信号处理器来说，寻找同步脉冲一直都是一项十分重要的工作。 - Using the SYNC WiFi system, a signal will be broadcast throughout the vehicle.
使用SYNCWiFi系统，无线信号可在车内传播。 - Envelope level of sync peak for modulated vision signal
水平同步调节电位器已调图像信号同步顶包络电平 - Novel frame SYNC signal detection method for multi-level optical discs
一种多阶光盘帧同步信号的数字检测方法 - Tri-level sync eliminates the DC component and provides a more robust way to identify the coming of synchronization in the signal chain.
三电平同步方式消除了直流分量，提供了更有效的办法来确定同步信号在信号链的位置。 - Optimum Synthetic Design Method for TV Sync Signal
电视同步信号的优化综合 - Digital Processing of the TV Sync and Sound Signal
电视同步与伴音信号的数字处理 - The paper introduces a new method for making sync signal source in intelligent instrumentation. The microcontroller 8031 is used and table look-up technique with EPROM is taken, featuring with easy implementation, programmable frequency and high sync precision.
本文介绍一种在智能测试仪器中产生同步测试信号源的新方法，它使用一个8031单片机并运用了EPROM查表技术，具有实现简单、信号频率可程控、同步精度高等特点。 - The operational principle and hardware of the analyzer are described with the emphasis being put on the sync signal processing and peak value acquisition.
本文介绍其工作原理和硬件结构，着重分析了同步信号和峰值采样的方法。 - FPGA is divided into 6 function modules, and it completed clock generation, pixel counter, field signal generation, line counter and group, sync/ blank control signal generation, active test pictures generation respectively.
FPGA内部划分为六个功能模块，分别完成时钟产生、像素计数、场信号产生、行计数与分类、同步/消隐控制信号产生、有效测试图案产生。 - Based on the Electrical Synthetic Design Method for TV sync signal [ 1], the result which coincides with both computer simulation and practical experiment is given by means of optimum design and computer simplified method of multi-variable output of combined logic function.
本文根据文献[1]给出的设计，对电视同步信号的电子综合法，采用优化设计及组合逻辑函数多变量输出的计算机化简方法，取得了与计算机模拟验证和电路实验验证完全一致的结果。 - To design the control system of LCD, a method based on CPLD is described, including the means of designing the horizontal sync signal and the vertical sync signal with VHDL.
介绍了基于CPLD液晶显示屏控制系统的设计方法，并详细介绍了用VHDL硬件描述语言设计行，场液晶显示时序与控制的方法。 - It can separate sync signals from NTSC, PAL and SECAM video signals, and produces composite sync output signal, back porch output signal, horizontal sync signal, vertical sync signal and odd/ even field output signal.
它可以对NTSC、PAL、SECAM制式的视频信号进行同步分离，获得所需的同步信号，还能准确地输出复合同步、后沿输出、行同步、场同步和奇/偶场输出信号。 - According to the adaptive control principle, output parameters of oven controlled crystal oscillator and the pulses per second ( PPS) signals of GPS are identified and processed by using the CPLD and single-chip microcomputer. Therefore, a high-precision sync clock signal with settable frequency is formed.
以“CPLD+单片机”作为控制器件，依据自适应控制的原理对恒温晶振的时钟信号和GPS的秒脉冲（pulsespersecond，PPS）进行参数辨识和自适应处理，获得了频率可设定的高精度同步时钟信号。 - Its main tasks include sync signal abstracting 、 Y/ C separation 、 color subcarrier recovery 、 color demodulation and output format conversion.
其主要任务为：电视同步信号提取、亮色分离、色度副载波恢复及色度解调、输出格式转换等。 - Software is used to detect sync signal and distinguish voltage phase sequence which can simplify periphery hardware.
用软件实现同步信号的检测与主回路电压相序判别，使外围硬件结构更简单； - Using CPLD to design video sync signal generator
利用CPLD设计视频同步信号发生器 - Then, Bei-dou receiver, GPS receiver and external IRIG-B code use as the external sync signal, hot spare of each other.
接着，本文利用北斗接收机、GPS接收机和外部IRIG-B码作为系统的外同步信号，互为热备用。 - The main work is as follows: ( 1) The design of sync signal generator.
主要研究工作如下：（1）同步信号发生器硬件设计与制作。 - At last, the software and hardware of the system are discussed in detail, especially the design of modules of sync signal abstracting and color process.
本文首先介绍了电视原理相关内容，然后详细阐述了系统的总体设计以及软硬件实现的具体方案，尤其是同步提取和色度处理模块的设计和实现。 - Accepted picture output two streams, from one of which the composite sync outputs needed by chip for video characters overlapping is separated in the video sync separator. The other is input of the video amplifying circuit to drive the signal.
接收到的图像信号分两路，一路进入同步信号分离器，分离出字符叠加芯片所需的复合同步信号，另一路进入视频放大电路，对信号进行驱动。